The 2 groups of memory slots are assigned to a single CPU each. Currently I presume that only the SPD of the 1st CPU is recognized.
Are you sure this is really a Lenovo issue or might it be a limitation of the Intel Tylersburg 5520 chipset? If Lenovo had followed an Intel reference design the Information needed might already have been published by Intel.
Simpler question: Are there other 5520-dual-processor-mainboards, where AIDA64 is able to read all SPD Information (e.g. https://ark.intel.com/de/products/36599/Intel-Server-Board-S5520HC )?