Fiery

Please copy your AIDA64.INI file as AIDA64.TXT and send me that file attached to an email. I'll send you my email address in private message.

It looks quite impressive actually! As for your original question, L3 write bandwidth cannot scale as great as the read and copy because the CPU has to verify if there's a collision with other L3 cache segments in order to maintain cache coherency.

Thx

Meanwhile the bug fix has been rolled out as a new AIDA64 beta update: https://www.aida64.com/downloads/latesta64xebeta

We've checked it on our own Aquaero 5 Pro device, and it fails to work there either. I suspect in a recent firmware Aqua Computer removed this feature or revamped in a way that it became incompatible with AIDA64. We've sent an inquiry to our friends at Aqua Computer to find out how to solve this. I'll let you know in this topic once we've got a reply from them.

Memory latency is a key in the PhotoWorxx score. In which case when there are too many threads fighting for RAM access, scores can indeed drop heavily. So with this particular benchmarks it's not always best to have a lot of CPU threads at your disposal

I can only help you about AIDA64, I don't know the other tools. In what way can I help you? Please send me a private message about this, it will be easier to talk there about various issues.

I'm afraid I'm more confused about all that than ever before. If it's possible, please send me an email about this issue. I think you must have my email address from previous correspondance. But if not, just drop me a private message and we'll go from there.

The real fix or solution to this issue would be if NZXT came up with a SDK or some other solution where 3rd party apps could safely communicate with NZXT hardware, without having to worry about collisions with NZXT's own CAM software performing similar hardware polling.

Based on your email address I cannot find your license. In private message please send me your full name, an alternative email address (that you might have used during the purchase process) and an approx. date of purchase, and I will look it up.

None of our benchmarks are memory bound. The PhotoWorxx however relies heavily on the CPU caches, not just the data crunching power of the CPU cores.

But, you can consider going for just a 2nd hand 15-inch of 17-inch LCD monitor as well that you can connect to your PC via DSub, HDMI or DVI, and extend your Windows Desktop on it. Then you can switch from the external LCD module to the AIDA64 SensorPanel.

Not many. One example is BeadaPanel:

The above mentioned new AIDA64 beta is available for download at: https://www.aida64.com/downloads/latesta64xebeta Let me know how it works.

1) That is usually due to the fact that Intel disables SPD polling on their DP/QP Xeon platforms. AFAIK in such cases only the BIOS Setup (UEFI Setup) can talk to the SPD chip of the memory modules. You can check if other Windows software (like CPU-Z, HWiNFO64, SIV) can obtain SPD information, but I'm 100% sure they won't, since it's due to a platform limitation and not an AIDA64 bug. 2) 15 minutes seems quite excessive, but a shorter delay (1 or 2 minutes) is normal when you use the RAM test with 64+ GigaBytes of system memory installed. It's because AIDA64 allocates most of the system memory in its RAM stress test, and Windows sadly gets slower and slower allocating and locking system memory pages. The more RAM you've got in your system, the more time it takes for a Windows software to allocate the whole system memory. We're working on a new generation of AIDA64 System Stability Test that would use various workarounds to get rid of the responsivity issue while allocating system memory, so soon there will be a cure 3) A 12-channel DDR4-2667 system has a theoretical memory bandwidth of 250 GIgaBytes/sec, but it's a theoretical value that your configuration may or may not be able to provide. In case you deem the actual memory bandwidth you can utilize should be higher than 162 GigaBytes/sec, then make sure to ask Supermicro or Intel about their stance on the issue. We're confident that the AIDA64 version you're using (v6.20) fully supports your platform and provides the right benchmark scores reflecting the true performance of your system.

Well.. It's quite difficult to double-check your theory due to the lack of multi-threaded memory bandwidth benchmark software for Windows But either way, it would be best to populate all available memory channels for optimal performance.

I'm afraid we (the developers of AIDA64) don't know the answer to those, but maybe there're other forum users here who would be able to help you out.

The "CPU" temperature is measured by the onboard sensor chip, while the individual core temperatures are measured by the CPU itself. We consider the core temperatures more dependable and more accurate due to the fact that the CPU measures them for itself, without relying on an external hardware component of the motherboard. We don't have a manual that would explain that, but we're happy to answer your questions here.

I'm glad you've managed to solve it. Especially since most of the Haswell CPU based laptops will throttle no matter what you do about the heat conductor paste...

I'm glad you've managed to solve it. Especially since most of the Haswell CPU based laptops will throttle no matter what you do about the heat conductor paste...

Ah you mean such fluctuation. That cannot happen in AIDA64 because the BCLK is only measured once to avoid collisions between Windows 10 kernel and AIDA64. So the CPU clock speed will be fixed as long as the CPU clock ratio is fixed.

Thank you, we'll check it out.

Have you tried to change the LCD display page on the Aquaero device itself? After activating Aquaero LCD support in AIDA64, you need to select the relevant page on the Aquaero device as well.

That ratio between the read and write memory bandwidth is normal on the type of system you've got.

That is due to a limitation of server-class Intel systems that AFAIK it's not possible to get around. Intel simply puts the IMC (Integrated Memory Controller) of such Xeon processors into a mode that prevents Windows software from polling the SPD chips connected to those IMC's.